Processor Architecture: Von Neumann
Why This Matters
This lesson explores the Von Neumann architecture, a fundamental design concept for most modern computers. It details how a single address space is used for both instructions and data, and the key components that facilitate program execution.
Key Words to Know
Introduction to Von Neumann Architecture
The Von Neumann architecture, proposed by John von Neumann in 1945, is the foundational design for almost all modern computers. Its defining characteristic is the stored program concept, where both program instructions and the data they operate on are stored together in a single, shared memory space. This unified memory model simplifies the computer's design by using a single set of buses for both instructions and data, making the system more flexible and easier to program. Before Von Neumann, computers were often rewired for each new task, but this architecture allowed programs to be loaded and changed electronically. This flexibility is what enables a single computer to perform a vast array of different tasks simply by loading different software.
Key Components of a Von Neumann Machine
A Von Neumann machine consists of several interconnected components working in harmony. The Central Processing Unit (CPU) is the core, comprising the Arithmetic Logic Unit (ALU), Control Unit (CU), and a set of registers. The Arithmetic Logic Unit (ALU) performs arithmetic operations (addition, subtraction) and logical operations (AND, OR, NOT). The Control Unit (CU) manages and coordinates all components, fetching instructions from memory, decoding them, and issuing control signals. Main Memory (RAM) stores both instructions and data. Input/Output (I/O) devices allow interaction with the outside world. These components communicate via a system of buses, which are sets of parallel wires dedicated to carrying data, addresses, and control signals.
The Fetch-Decode-Execute Cycle
The CPU continuously performs the Fetch-Decode-Execute Cycle to process instructions.
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Fetch: The Program Counter (PC) holds the address of the next instruction. This address is copied to the Memory Address Register (MAR). The instruction at this address is then fetched from main memory and copied into the Memory Data Register (MDR), and then into the Current Instruction Register (CIR). The PC is incremented to point to the next instruction.
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Decode: The Control Unit interprets the instruction held in the CIR. It determines what operation needs to be performed and identifies any operands required (e.g., data to be processed, memory addresses).
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Execute: The Control Unit sends signals to the appropriate components (e.g., ALU, registers, memory) to carry out the decoded instruction. This might involve performing calculations, moving data between registers, or reading/writing to memory. The result might be stored in the Accumulator (ACC) or another register.
Registers in the CPU
Registers are small, high-speed storage locations within the CPU that temporarily hold data and control information duri...
Buses and Their Functions
Buses are crucial for communication between the CPU, memory, and I/O devices. There are three main types of buses:
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Exam Tips
- 1.Be able to clearly define and explain the 'stored program concept' and its significance.
- 2.Draw and label a simple block diagram of the Von Neumann architecture, showing the CPU, Memory, and I/O, and the buses connecting them.
- 3.Describe the Fetch-Decode-Execute cycle step-by-step, explaining the role of each register involved (PC, MAR, MDR, CIR).
- 4.Know the function of each key register (PC, MAR, MDR, CIR, ACC) and the three types of buses (Address, Data, Control).
- 5.Understand the difference between Von Neumann and Harvard architectures (though Harvard is less common in A-Level, knowing the distinction helps solidify Von Neumann understanding).